IBM announced what it calls the world's first sub-1-nanometer chip technology, built on a new 3D architecture the company has branded "nanostack." The reveal came out of IBM Research in Yorktown Heights on June 25, 2026.
The pitch is straightforward: stacking transistors in three dimensions lets IBM keep shrinking effective feature size after traditional 2D scaling has run out of room. The company frames the breakthrough as enough to "propel the semiconductor industry forward for the next decade."
Why it matters
Every AI model, data center, and phone is ultimately gated by what a chip can do per watt. A credible path below 1nm is less about a single product and more about keeping the whole compute curve moving — which is the real constraint on where AI goes next. The claim is bold; the proof will be in yield and whether it ships at volume.
Source: IBM Newsroom